JPH0318348B2 - - Google Patents

Info

Publication number
JPH0318348B2
JPH0318348B2 JP56191091A JP19109181A JPH0318348B2 JP H0318348 B2 JPH0318348 B2 JP H0318348B2 JP 56191091 A JP56191091 A JP 56191091A JP 19109181 A JP19109181 A JP 19109181A JP H0318348 B2 JPH0318348 B2 JP H0318348B2
Authority
JP
Japan
Prior art keywords
wiring
channel mos
mos transistor
region
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56191091A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5890758A (ja
Inventor
Teruo Noguchi
Isao Ookura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56191091A priority Critical patent/JPS5890758A/ja
Priority to US06/440,163 priority patent/US4562453A/en
Priority to EP82306212A priority patent/EP0080361B1/en
Priority to DE8282306212T priority patent/DE3277347D1/de
Publication of JPS5890758A publication Critical patent/JPS5890758A/ja
Publication of JPH0318348B2 publication Critical patent/JPH0318348B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/765—Making of isolation regions between components by field effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP56191091A 1981-11-25 1981-11-25 相補形集積回路装置 Granted JPS5890758A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP56191091A JPS5890758A (ja) 1981-11-25 1981-11-25 相補形集積回路装置
US06/440,163 US4562453A (en) 1981-11-25 1982-11-08 Complementary metal-oxide semiconductor integrated circuit device of master slice type
EP82306212A EP0080361B1 (en) 1981-11-25 1982-11-22 Complementary metal-oxide semiconductor integrated circuit device of master slice type
DE8282306212T DE3277347D1 (en) 1981-11-25 1982-11-22 Complementary metal-oxide semiconductor integrated circuit device of master slice type

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56191091A JPS5890758A (ja) 1981-11-25 1981-11-25 相補形集積回路装置

Publications (2)

Publication Number Publication Date
JPS5890758A JPS5890758A (ja) 1983-05-30
JPH0318348B2 true JPH0318348B2 (en]) 1991-03-12

Family

ID=16268701

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56191091A Granted JPS5890758A (ja) 1981-11-25 1981-11-25 相補形集積回路装置

Country Status (4)

Country Link
US (1) US4562453A (en])
EP (1) EP0080361B1 (en])
JP (1) JPS5890758A (en])
DE (1) DE3277347D1 (en])

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6035532A (ja) * 1983-07-29 1985-02-23 Fujitsu Ltd マスタスライス集積回路装置
JPS6047441A (ja) * 1983-08-26 1985-03-14 Fujitsu Ltd 半導体集積回路
JPS6048090A (ja) * 1983-08-26 1985-03-15 伊勢電子工業株式会社 螢光表示装置
JPS6055641A (ja) * 1983-09-07 1985-03-30 Agency Of Ind Science & Technol Ｍｏｓ型シリコン集積回路素子
JPS6065547A (ja) * 1983-09-20 1985-04-15 Sharp Corp 半導体装置
JPS60101951A (ja) * 1983-11-08 1985-06-06 Sanyo Electric Co Ltd ゲ−トアレイ
DE3482528D1 (de) * 1984-06-19 1990-07-19 Siemens Ag In c-mos-technik realisierte basiszelle.
DE3478262D1 (en) * 1984-12-28 1989-06-22 Ibm Multifunction prediffused cmos array
US4602270A (en) * 1985-05-17 1986-07-22 United Technologies Corporation Gate array with reduced isolation
US4783749A (en) * 1985-05-21 1988-11-08 Siemens Aktiengesellschaft Basic cell realized in the CMOS technique and a method for the automatic generation of such a basic cell
US5051917A (en) * 1987-02-24 1991-09-24 International Business Machines Corporation Method of combining gate array and standard cell circuits on a common semiconductor chip
US4786613A (en) * 1987-02-24 1988-11-22 International Business Machines Corporation Method of combining gate array and standard cell circuits on a common semiconductor chip
US4884115A (en) * 1987-02-27 1989-11-28 Siemens Aktiengesellschaft Basic cell for a gate array arrangement in CMOS Technology
JPH0812903B2 (ja) * 1987-10-19 1996-02-07 三菱電機株式会社 ゲートアレイ集積回路
US4849366A (en) * 1988-01-15 1989-07-18 Industrial Technology Research Institute Method of making a gated isolated structure
US5369595A (en) * 1988-03-18 1994-11-29 International Business Machines Corporation Method of combining gate array and standard cell circuits on a common semiconductor chip
US4933576A (en) * 1988-05-13 1990-06-12 Fujitsu Limited Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit
US4928160A (en) * 1989-01-17 1990-05-22 Ncr Corporation Gate isolated base cell structure with off-grid gate polysilicon pattern
US5214299A (en) * 1989-09-22 1993-05-25 Unisys Corporation Fast change standard cell digital logic chip
US5308798A (en) * 1992-11-12 1994-05-03 Vlsi Technology, Inc. Preplacement method for weighted net placement integrated circuit design layout tools
US5420447A (en) * 1993-01-29 1995-05-30 Sgs-Thomson Microelectronics, Inc. Double buffer base gate array cell
EP0614224A1 (en) * 1993-03-05 1994-09-07 STMicroelectronics, Inc. Basic gate array cell with salicide power distribution
JP3647323B2 (ja) * 1999-07-30 2005-05-11 富士通株式会社 半導体集積回路

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1440512A (en) * 1973-04-30 1976-06-23 Rca Corp Universal array using complementary transistors
DE2823555A1 (de) * 1977-05-31 1978-12-07 Fujitsu Ltd Zellenfoermige integrierte schaltung
JPS5925381B2 (ja) * 1977-12-30 1984-06-16 富士通株式会社 半導体集積回路装置
US4249193A (en) * 1978-05-25 1981-02-03 International Business Machines Corporation LSI Semiconductor device and fabrication thereof

Also Published As

Publication number Publication date
JPS5890758A (ja) 1983-05-30
EP0080361A2 (en) 1983-06-01
US4562453A (en) 1985-12-31
DE3277347D1 (en) 1987-10-22
EP0080361A3 (en) 1985-01-16
EP0080361B1 (en) 1987-09-16

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